Pull Requests
Each of the revisions below represents a head commit in the pull request labeled with backend:SPIR-V in the LLVM repository.
-
[clang:frontend] Move helper functions to common location for Se… QUEUED
494ddbeb7f8177f25316465bb967cddb237a34ce 01/30/2025 10:16 -
[clang:frontend] Move helper functions to common location for Se… QUEUED
e36627178a02170a55564efbd545f0b6ec2781cf 01/30/2025 10:16 -
[SPIR-V] Avoid repeated map lookups. NFC QUEUED
4bb5dd0e0dd718499d8ab88537f47b84604c64a2 01/30/2025 06:49 -
[IR][SPIR-V] Replace of PointerType::get(Type) with opaque versi… QUEUED
e0f92e6a28f94064db1a182abd46a1fd984a5803 01/28/2025 14:28 -
[SPIR-V] Change a way SPIR-V Backend API works with user facing … QUEUED
6f121f221596c57c35e924f423647b1a9173b011 01/28/2025 13:44 -
[SPIR-V] Change a way SPIR-V Backend API works with user facing … QUEUED
2bdceba062fc030f471682f6b0f78e912502df27 01/28/2025 13:44 -
[LIB][TOOLS] Modernize unique_ptr new() C++11 to std::make_uniqu… QUEUED
1398aed1b49dc1ec828f71ee9d9f7abec61c2562 01/28/2025 04:01 -
[SPIR-V] Fix parsing of command line options for the SPIR-V Back… QUEUED
e8527cd9583e28d4b71b8579e797f7b87554f604 01/27/2025 23:14 -
[SPIR-V] Fix parsing of command line options for the SPIR-V Back… QUEUED
ba9970b23d17cc6c40f1270641c9f625a18326ee 01/27/2025 23:14 -
[SPIR-V] Fix parsing of command line options for the SPIR-V Back… QUEUED
7177bdf66b19fd987cfdf4ca92fe27798c0dfb99 01/27/2025 23:14 -
[NFC] Remove `reflect-error.ll` as a failing testcase QUEUED
a2a717ac4dda72f5324058184947afa74690c084 01/23/2025 00:23 -
[SPIR-V] Rename internal command line flags for optimization lev… QUEUED
ef4f9ddacd7274700cd9281df2b6307bd45b0b4a 01/22/2025 18:14 -
[SPIR-V] Rename internal command line flags for optimization lev… QUEUED
a249634a1da88e92afa89dcae101c8199a49e3be 01/22/2025 18:14 -
Update SPIRVUsage.rst QUEUED
b44545a427e2a5d863ac6fc21c4e10fbc73f3ef3 01/22/2025 07:37 -
Update SPIRVUsage.rst QUEUED
3005f49333cdb6dd2f5d1d8dbab567e7ef3457ac 01/22/2025 07:37 -
Reland "[HLSL] Implement the `reflect` HLSL function" QUEUED
def10ad82c6e527ba5c3aa29b76041dc94acff1d 01/21/2025 23:50 -
[SPIR-V] Support all the instructions of SPV_KHR_integer_dot_pro… QUEUED
09b78625620d41cf5b989f972f6591157697b8d8 01/21/2025 17:48 -
[SPIR-V] Support all the instructions of SPV_KHR_integer_dot_pro… QUEUED
7ac9b126e3b6b3d4d3d57c7b153a8e03bf5050ba 01/21/2025 17:48 -
[SPIR-V] Fix debug-type-pointer.ll test case QUEUED
d9ddcf25e380e8438b6ae597da6db78154beb9d2 01/21/2025 15:24 -
[SPIR-V] Ensure that Module resource is managed locally wrt. a u… QUEUED
c136663caa18e23b0fab95311b912e2112454cad 01/21/2025 10:23 -
[SPIR-V] Refactor buildMemSemanticsReg to ensure type compatibil… QUEUED
594d447368525579bc10e4f1a35f09cdd446399a 01/20/2025 23:44 -
[SPIR-V] Fix type compatibility in memory order comparisons QUEUED
8d327e67f701562665856d84a283aeb593f28ea3 01/20/2025 23:44 -
[SPIR-V] Fix SPIRVEmitIntrinsics undefined behavior QUEUED
a356b104df70182cbd0e9c622faa3362a883d553 01/20/2025 14:50 -
[SPIR-V] Fix an undefined behaviour in the SPIRV emit-intrinsics… QUEUED
df2134d881bdb85a3fb863ec5ba9ea23653bf8fb 01/20/2025 14:19 -
[SPIR-V] Improve portability of the code QUEUED
75cf05aea8cdec1b605ad697a8dbe89a1f3e3397 01/20/2025 10:55 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveMax` intrinsic QUEUED
7f2b2d1610a9339016cc6dec477e2f63685e4de7 01/18/2025 00:17 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveMax` intrinsic QUEUED
2df5fcae03240e3b6dd602e4ab3f59472c2a4f9f 01/18/2025 00:17 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveMax` intrinsic QUEUED
0d8b20e2965af2b512006639f691c8ecda37c3fa 01/18/2025 00:17 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveMax` intrinsic QUEUED
a6e802847eda6e1fb09697e051b5cd7e8503f2f6 01/18/2025 00:17 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveMax` intrinsic QUEUED
8cc5c67cbfd77b5a4d780e51d7face2a511420c7 01/18/2025 00:17 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveMax` intrinsic QUEUED
8f1c32e69b5784c3fa6fa5bbfdbd60afaa22649a 01/18/2025 00:17 -
[SPIR-V] Fix --target-env version value in the test case QUEUED
86aeaac8b4186a3ee285854075589bda835d6daa 01/16/2025 12:17 -
[HLSL] Implement the `reflect` HLSL function QUEUED
3f3b8c75c14bb9b3ed611c9cddec49d0e9339705 01/15/2025 00:46 -
[HLSL] Implement the `reflect` HLSL function QUEUED
dabf792773ef3f0c3e21ec08fc0491e11b61fe74 01/15/2025 00:46 -
[HLSL] Implement the `reflect` HLSL function QUEUED
782e1a28d4f8ddbeb92a9c57b3f071ba837ce129 01/15/2025 00:46 -
[HLSL] Implement the `reflect` HLSL function QUEUED
c0f9fa3f9b73f41fc56baaf8da43ef11c56e1bf9 01/15/2025 00:46 -
[HLSL] Implement the `reflect` HLSL function QUEUED
f1a94b489b7084e533df203695b06683e4a7c7ea 01/15/2025 00:46 -
[SPIRV] add pre legalization instruction combine QUEUED
457fff992d5fcccf36e2d60de864a96161921cea 01/14/2025 01:09 -
[SPIRV] add pre legalization instruction combine QUEUED
ae1a274f856518d710cffba324c603d9e95adf54 01/14/2025 01:09 -
[SPIRV] add pre legalization instruction combine QUEUED
0d1bcdb1270c658000a8b881310fa98edfcec1f5 01/14/2025 01:09 -
[SPIRV] add pre legalization instruction combine QUEUED
be94f37f3f81c26bc287103bfe37456c9afd7f35 01/14/2025 01:09 -
[SPIRV] add pre legalization instruction combine QUEUED
a9e58743556b18089c008d11ab4275a6b27650d0 01/14/2025 01:09 -
[SPIRV] add pre legalization instruction combine QUEUED
a4e01af2d0a0ad4ecaafdb2b738439ba745257cd 01/14/2025 01:09 -
[SPIRV] add pre legalization instruction combine QUEUED
1b36f2b8e28caca62dc79d53a7115960c4e18df6 01/14/2025 01:09 -
[SPIRV] add pre legalization instruction combine QUEUED
e27efa249bd40ff481b18af7d968881a86631673 01/14/2025 01:09 -
[SPIR-V] Specify target environment in tests referring to the Bu… QUEUED
1c9c93be6591613a70043c3911aa63be2e03addb 01/13/2025 17:56 -
[SPIRV] Fix graphic test to use correct triple. QUEUED
934bca581643d6e70c1425d69e6741854194e6ea 01/13/2025 16:35 -
[SPIR-V] Ensure no uses of intrinsic global variables after modu… QUEUED
f75c2e9c28789e445077ab871a175a8a001ed82c 01/13/2025 15:33 -
[SPIRV] Expand RWBuffer load and store from HLSL QUEUED
1eba9d8073f3f77c9325b92ed00f6b75555a671b 01/09/2025 19:57 -
[SPIRV] Expand RWBuffer load and store from HLSL QUEUED
16ee762e6151ac75cb5a86d605be2d767dd80e6d 01/09/2025 19:57 -
[SPIRV] Expand RWBuffer load and store from HLSL QUEUED
99c23ca71ad41cb68e1e0e504bc4174a29d69838 01/09/2025 19:57 -
[clang][Driver][SPIR-V] Make tool names consistent QUEUED
6fe5690d4b5051391dbb7d2f760c437376bf9a7e 01/09/2025 19:07 -
[SPIRV] convergence anchor intrinsic does not have a parent token QUEUED
f474d32bd07bc03abd2142ca022fc4d2d167671d 01/09/2025 07:59 -
[SPIRV] convergence anchor intrinsic does not have a parent token QUEUED
74bd77bcf46b01d394137fc2882e09a1a1dcbd17 01/09/2025 07:59 -
[SPIRV] Return success when selecting reads and writes. QUEUED
7c84a9a351e3a904d7b843b73fa6d162d78c34a3 01/08/2025 19:38 -
[SPIRV] Return success when selecting reads and writes. QUEUED
7565734346ce0955d9eee1ba7e9c0ea237707fba 01/08/2025 19:38 -
[HLSL] Adding Flatten and Branch if attributes with test fixes QUEUED
c5886a0eb8c7a7ccb86b0e0fba47f301ddd6cf72 01/08/2025 19:08 -
Revert #116331 & #121852 QUEUED
16626c800f880e433ee97550cd1784de343f111e 01/08/2025 13:03 -
[SPIR-V] Prefer SPV_INTEL_optnone over SPV_EXT_optnone when both… QUEUED
72d94157b359b9b487e3d35cbc18dc82efbd1689 01/08/2025 09:54 -
[NFC] fix up typos QUEUED
269b25fae5ea78c3c851bd041966d2eff4c01eb1 01/06/2025 21:48 -
[AsmParser] Revamp how floating-point literals in LLVM IR. QUEUED
69fce1904ae71a792575c735c22efcc5d65907d7 01/06/2025 21:23 -
[IR][AsmParser] Revamp how floating-point literals in LLVM IR. QUEUED
1a57536fe56c172a2bf5944c672278db173c2bc0 01/06/2025 21:23 -
[IR][AsmParser] Revamp how floating-point literals in LLVM IR. QUEUED
ae7b09599dcff94f0dfca61b9084b397b3c184f9 01/06/2025 21:23 -
[IR][AsmParser] Revamp how floating-point literals work in LLVM … QUEUED
44be9d14d28f268b85e8271df0395108a76c9f88 01/06/2025 21:23 -
[SPIRV] Add Target Builtins using Distance ext as an example QUEUED
74f86806bbdf1397973f70043ce0856bc6a4a4a7 01/03/2025 20:09 -
[HLSL][SPIR-V] implement SV_GroupID semantic lowering QUEUED
21114c408baaa9309e3370d46a4ee196cc4f714a 01/02/2025 20:44 -
[HLSL][SPIR-V] implement SV_GroupID semantic lowering QUEUED
b4cde3bdd9d6157068312654fbb1b3d2f87d2af9 01/02/2025 20:44 -
[SPIRV] Add support for `cl_khr_extended_bit_ops` QUEUED
54128bbf1dc8d43949fde2f43337a4e372445c1d 12/19/2024 12:49 -
[SPIRV] Add support for `cl_khr_extended_bit_ops` QUEUED
c3fe99965b0cb9159efc18d50bc33e0173508ecb 12/19/2024 12:49 -
[SPIRV] Add support for `cl_khr_extended_bit_ops` QUEUED
775d4eaff9a156a1a755a6465fba756b8225f80f 12/19/2024 12:49 -
[SPIR-V] Fix OpName and LinkageAttributes decoration of global v… QUEUED
90590c1e8efb73fb77c610f478b1e3dc816522b8 12/18/2024 23:15 -
[DirectX][SPIRV] Consistent names for HLSL resource intrinsics QUEUED
9ba8963297637bbd12499de5de0a6eb7f3b40894 12/18/2024 18:45 -
[DirectX][SPIRV] Consistent names for HLSL resource intrinsics QUEUED
ccc430f0a59eaae2a861a54d5daca7c8fd8cac04 12/18/2024 18:45 -
[DirectX][SPIRV] Consistent names for HLSL resource intrinsics QUEUED
3994563c444e3e3572206ee0c253e4566d6d9180 12/18/2024 18:45 -
[SPIR-V] Overhaul module analysis to improve translation speed a… QUEUED
32b56ace7f0d03003fd8e66f0aff37a9ebac4123 12/18/2024 12:43 -
[Driver][SPIR-V] Use consistent tools to convert between text an… QUEUED
998827f68bb2f9c1ca43f1132e109406db842880 12/17/2024 16:58 -
[Driver][SPIR-V] Use consistent tools to convert between text an… QUEUED
d6354da3b36b973f3f507a40e77d38d40031dbfa 12/17/2024 16:58 -
[Driver][clang-linker-wrapper] Add initial support for OpenMP of… QUEUED
9a0a9f3f0c5039920dbc28fbe478e757073c3fb3 12/16/2024 21:00 -
[Driver][clang-linker-wrapper] Add initial support for OpenMP of… QUEUED
261547cd3b1d2088d5a2ed4a07487fbd8aabf59e 12/16/2024 21:00 -
[Driver][clang-linker-wrapper] Add initial support for OpenMP of… QUEUED
9c97a922ce8545537a42cd7b3081c8225cce0390 12/16/2024 21:00 -
[Driver][clang-linker-wrapper] Add initial support for OpenMP of… QUEUED
476414806964bbc87d98199afe430946282fd4ee 12/16/2024 21:00 -
[SPIR-V] Fix issue #120078 and simplifies parsing of floating po… QUEUED
4881e702f9380e886e48afd8280b377767fd33c6 12/16/2024 19:19 -
[SPIR-V] Fix issue #120078 and simplifies parsing of floating po… QUEUED
b828a4a811b5b4061802cfbd78fc9f674612d461 12/16/2024 19:19 -
[SPIR-V] Add saturation and float rounding mode decorations, a s… QUEUED
cd9768b8e46d0f365fe8940b794b7f35181a6f15 12/13/2024 11:46 -
[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS QUEUED
c4ebbc56c8ff8bfee17b930bcedaae65bd779b9f 12/12/2024 03:27 -
[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS QUEUED
b9c63d0449bf96a88b738f5bd3e3a70a20160ab6 12/12/2024 03:27 -
[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS QUEUED
06f3baac86c6dd359094fd919ba3c77d46ee12f7 12/12/2024 03:27 -
[SPIR-V] Add SPIRV to LLVM_ALL_TARGETS QUEUED
6c2415a287587aa3e19633a00b58eb003a9451da 12/12/2024 03:27 -
[SPIR-V] Mark XFAIL tests which fail with LLVM_ENABLE_EXPENSIVE_… QUEUED
2b9a5006fd51980d3a5a0563273ba9cd991523de 12/11/2024 04:24 -
[SPIRV][OPT] Adding flag to run spirv structurizer QUEUED
3dad8697772fed45b884dc61b7f78d96aa6e442f 12/10/2024 00:31 -
[SPIRV][OPT] Adding flag to run spirv structurizer QUEUED
2d9f02d6d3f598fbe68a83377bb05d6b5c52c55d 12/10/2024 00:31 -
[SPIR-V] Improve general validity of emitted code between passes QUEUED
906cdbe9571c7b653af78ee157d2867e00bd3929 12/09/2024 11:50 -
[SPIR-V] Improve general validity of emitted code between passes QUEUED
3e74d2c6983af986b70060ca44e6e1fbcb34a554 12/09/2024 11:50 -
[SPIR-V] [NFC] Verify cl_intel_subgroup_local_block_io extension… QUEUED
fcb975af6bf90eacce886951c3fb201c0c8c38a1 12/05/2024 12:45 -
[SPIR-V] [NFC] Verify cl_intel_subgroup_local_block_io extension… QUEUED
7f69a3f2be075db44e71171cb0b26f898ecff6f3 12/05/2024 12:45 -
[SPIR-V] Replace assert with report_fatal QUEUED
d4b2ec484ad24eb3819c686bb6fffe7e6307f33e 12/04/2024 12:08 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
3374591aedebf7102ee3402e0421e671d849b7cb 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
bad4640a731eba23355d792ab5b3442582d6c72a 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
4d8df8b4a226e39d88401dcb5aa6ee7f944eec73 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
780b8d060ae8e8ef5b14ae7f6c1c30a19f0751a1 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
55349c60735c1f5a3eae393bdb99ce72098bc48c 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
9a7cc089d03c6025d0195cfac60187e03522b505 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
8c0c46a5ddab706a003c61c9966d8c48a0cd7f98 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
4ceeceba3c1b9ecad7afde79729326c3aa2a3148 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
cc59394e0dae647b1f93555c7d3d32126bc9437f 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
bb744e94311ba55d7a90fe997706eeaeec719737 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
9a6c95d6b39b7481a150840729b9f7233386217c 12/04/2024 02:30 -
[HLSL][SPIRV][DXIL] Implement `WaveActiveSum` intrinsic QUEUED
5f11d2b95d3e3adcbacc3287885a907e32a039f9 12/04/2024 02:30 -
[SPIR-V] Add SPV_INTEL_joint_matrix extension QUEUED
0556328ee5adec96f38c2105536e33d852ab216f 12/04/2024 02:20 -
[SPIR-V] Add SPV_INTEL_joint_matrix extension QUEUED
5f459b8cd737fdad936db945848a03a590e025dc 12/04/2024 02:20 -
[SPIR-V] Add SPV_INTEL_joint_matrix extension QUEUED
cfacb9972c12e6bfd4b75b986f6fdf7ed3f3a693 12/04/2024 02:20 -
[SPIR-V] Emit Alignment decoration for alloca instructions QUEUED
066b4ba899225babc34a7c6ab69332c734a8ab02 12/03/2024 17:37 -
[SPIR-V] Emit Alignment decoration for alloca instructions and i… QUEUED
d3ed87cc5b58b5b117d41b2baeeeef448c6e9c26 12/03/2024 17:37 -
[SPIR-V] Emit Alignment decoration for alloca instructions and i… QUEUED
4cc9bffcbdd697efad4d9420ab823b394abdb4f0 12/03/2024 17:37 -
[SPIR-V] Emit Alignment decoration for alloca instructions and i… QUEUED
5c14dc3c9424b59589e62a40a6b791f55026d178 12/03/2024 17:37 -
[SPIR-V] Emit Alignment decoration for alloca instructions and i… QUEUED
19599624c5eb7096f98590f79fe6d4dea802f698 12/03/2024 17:37 -
[SPIR-V] Emit Alignment decoration for alloca instructions and i… QUEUED
d1023c8bb604ef9ce7a0529a009786ec388cbbe6 12/03/2024 17:37 -
[SPIR-V] Add XFAIL to the broken test QUEUED
378af155205e4c069d369633b8202b6debcfc674 12/03/2024 13:24 -
[SPIR-V] Fix SPV_INTEL_optnone and add SPV_EXT_optnone SPIR-V ex… QUEUED
dcbc99ef5f27eeb02fa82b52dc2debcd7072894f 12/02/2024 22:02 -
[SPIR-V] Fix emission of debug and annotation instructions and a… QUEUED
bc0fd8758b1000c259e297f3fe331419aee683b0 12/02/2024 22:02 -
[SPIR-V] Fix emission of debug and annotation instructions and a… QUEUED
6c8023e9c3dee5f90d57b993de96d60d8bc98855 12/02/2024 22:02 -
[SPIR-V] Emit OpConstant instead of OpConstantNull to conform to… QUEUED
8ef0fa2f6299e755d0fd8c617ccba62157572caa 12/02/2024 18:25 -
[SPIR-V] Fixup storage class for global private QUEUED
36115fd759c527762a427bece0ba4bd6a853944a 12/02/2024 16:36 -
[SPIR-V] Fixup storage class for global private QUEUED
cb4421fb8bbb929468da73bdd0999647221b7d9b 12/02/2024 16:36 -
Revert "[SPIR-V] Fixup storage class for global private (#116636… QUEUED
6b7c9a4d657e25aba530cee674dac1fe7e6bf6c5 12/02/2024 15:51 -
[SPIR-V] Fix generation of invalid SPIR-V in cases of of bitcast… QUEUED
6ce07f15851c836d7f8e9c2e4816906f4f3a5610 12/02/2024 14:28