Revision
Metadata
Title | [clang-format] Indent Verilog struct literal on new line |
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Hash | 6bf66d839f1386c06e19a3621c02c8fc6a14f94f |
Branch | origin/main |
Staging | False |
Committed | 06/29/2023 17:38 |
Skip | True |
Title | [clang-format] Indent Verilog struct literal on new line |
---|---|
Hash | 6bf66d839f1386c06e19a3621c02c8fc6a14f94f |
Branch | origin/main |
Staging | False |
Committed | 06/29/2023 17:38 |
Skip | True |